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Embedded Sopc System With Niosii II Processor and VHDL Examples, Hardcover by...
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- Book Title
- Embedded Sopc System With Niosii II Processor and VHDL Examples
- ISBN
- 9781118008881
- Subject Area
- Computers, Technology & Engineering
- Publication Name
- Embedded Sopc Design with Nios II Processor and Vhdl Examples
- Publisher
- Wiley & Sons, Incorporated, John
- Item Length
- 10.2 in
- Subject
- Electronics / Circuits / General, Software Development & Engineering / Systems Analysis & Design, Logic Design
- Publication Year
- 2011
- Type
- Textbook
- Format
- Hardcover
- Language
- English
- Item Height
- 1.7 in
- Item Weight
- 50 Oz
- Item Width
- 7.3 in
- Number of Pages
- 736 Pages
關於產品
Product Identifiers
Publisher
Wiley & Sons, Incorporated, John
ISBN-10
111800888X
ISBN-13
9781118008881
eBay Product ID (ePID)
11038739677
Product Key Features
Number of Pages
736 Pages
Language
English
Publication Name
Embedded Sopc Design with Nios II Processor and Vhdl Examples
Subject
Electronics / Circuits / General, Software Development & Engineering / Systems Analysis & Design, Logic Design
Publication Year
2011
Type
Textbook
Subject Area
Computers, Technology & Engineering
Format
Hardcover
Dimensions
Item Height
1.7 in
Item Weight
50 Oz
Item Length
10.2 in
Item Width
7.3 in
Additional Product Features
Intended Audience
Scholarly & Professional
LCCN
2011-022710
Dewey Edition
23
Illustrated
Yes
Dewey Decimal
621.39/2
Table Of Content
Preface. Acknowledgments. 1. Ovweview of Embedded System. Part I. Basic Digital Circuits Development. 2. Gate-level Combinational Circuit. 3. Overview of FPGA and EDA Software. 4. RT-level Combinational Circuit. 5. Regular Sequential Circuit. 6. FSM. 7. FSMD. Part II. Basic NIOS II Software Development. 8. Nios II Processor Overview. 9. Nios II System Derivation and Low-Level Access. 10. Predesigned Nios II I/O Peripherals. 11. Predesigned Nios II I/O Drivers and HAL API. 12. Interrupt and ISR. Part III. Custom I/O Peripheral Development. 13. Custom I/O Peripheral with PIO Cores. 14. Avalon Interconnect and SOPC Component. 15. SRAM and SDRAM Controllers. 16. PS2 Keyboard and Mouse. 17. VGA Controller. 18. Audio Codec Controller. 19. SD Card Controller. IV. Hardware Accelerator Case Studies. 20. GCD Accelerator. 21. Mandelbrot Set Fractal Accelerator. 22. Direct Digital Frequency Synthesis. References. Topic Index.
Synopsis
Embedded SoPC design with Nios II processor and VHDL examples An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well. The new flexibility allows us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks. As these technologies have matured, they have gradually become mainstream practice, and it is now possible to use a PC and an inexpensive FPGA prototyping board to construct a complex digital system. This book uses a "learn by doing" approach and illustrates the hardware and software design and development process by a series of examples. An Altera FPGA prototyping board and its Nios II soft-core processor are used for this purpose. The emphasis of the book is on hardware design and integration, and the book is divided into four major parts: Part I covers HDL and synthesis of custom hardware Part II introduces the Nios II processor and provides an overview of embedded software development Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology The examples are realistic projects and can be implemented and tested on the board. Some can be used as basic IP cores to be incorporated into more sophisticated systems. An embedded SoPC utilizes both customized software and hardware and is a very powerful design paradigm. However, its design and development require knowledge of several computer engineering disciplines and involves an array of software tools. While it is rewarding, the learning can be a long and winding journey. The book shows the trailhead and guides readers through the initial steps to exploit the full potential of this emerging methodology., This book explores the unique hardware programmability of field-programmable gate array (FPGA)-based embedded systems, using a learning-by-doing approach to introduce the embedded system on a programmable chip (SoPC) concept and development process to new designers through hands-on experiments., The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology. The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at www.altera.com/university ). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration., The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology. The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http: //www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration.
LC Classification Number
TK7895.G36
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